This application is related to Korean Application No. 99-59822, filed Dec. 21, 1999, the disclosure of which is hereby incorporated herein by reference.
The present invention relates to electronic generation circuits and methods, and more particularly, to reference voltage source circuits and methods.
It is generally desirable to maintain stable internal power supply voltage levels in integrated circuits (ICs) in order to prevent damage and maintain desired operational characteristics.
Accordingly, integrated circuits often include power supply voltage regulation circuits that generate internal power supply voltages from externally supplied power supply voltages.
These internal power supply voltage regulation circuits often use reference voltages produced by reference voltage generation circuits. Such reference voltage generation circuits may take many forms.
One type of reference voltage generation circuit includes a MOS transistor that has its drain and gate terminals tied together, and which has an associated threshold voltage that is used to generate a reference voltage. However, the threshold voltage of such a MOS transistor typically varies responsive to temperature and process variations. Accordingly, the accuracy of such reference voltage generation circuits may be sensitive to variations in temperature and process.
A conventional reference voltage generation circuit may use complementary circuits having respective positive and negative temperature coefficients to reduce sensitivity to temperature changes. Such circuits are described, for example, in xe2x80x9cVARIABLE VCC DESIGN TECHNIQUES FOR BATTERY OPERATED DRAMS,xe2x80x9d Symposium on VLSI Circuit Digest of Technical Papers, pp. 110-111, 1992.
Referring to FIG. 1, a conventional temperature compensating reference voltage generation circuit includes a power supply voltage terminal that receives a power supply voltage Vcc, a ground voltage terminal that is connected to a power supply ground Vss, and an output terminal at which a reference voltage VREF is produced. In further detail, the reference voltage generation circuit includes a current limiting resistor R1 coupled between the power supply voltage Vcc and a node N1. The reference voltage generation circuit further includes a voltage divider circuit including a second resistor R2 connected to the node N1, and first and second NMOS transistors M1, M2 that are serially connected between a node N2 and the power supply ground Vss, and have their gate terminals coupled to the node N1 and the power supply voltage Vcc, respectively. A P-MOS transistor M3 is coupled between the output terminal and the power supply ground Vss, and has its gate terminal coupled to the node N2.
If the xe2x80x9conxe2x80x9d resistance of the first and second NMOS transistors M1, M2 is denoted Req, and a threshold voltage of the PMOS transistor M3 is denoted |Vtp|, the reference voltage VREF may be expressed as:
In equation (1), the temperature coefficient of the PMOS transistor threshold                     VREF        =                              (                                          1                +                Req                            R2                        )                    ⁢                      xe2x80x83                    ⁢          c          ⁢                      xe2x80x83                    ⁢          Vtpc                                    (        1        )            
voltage |Vtp| typically is negative, while the temperature coefficient of the on resistance Req of the first and second NMOS transistors M1, M2 is typically positive. Accordingly, the reference voltage VREF is generated regardless of the temperature variation. That is, the reference voltage VREF regardless of the temperature variation can be obtained by offsetting the temperature variation by |Vtp| having the negative temperature coefficient and Req having the positive temperature coefficient.
However, the temperature characteristics of PMOS transistor M3 and NMOS transistors M1, M2 are opposite each other and also typically non-linear. For example, above a critical voltage Vcr(e.g., 1.2V), the reference voltage VREF produced by the conventional reference voltage generating circuit of FIG. 1 may increase with increasing temperature.
However, below the critical voltage Vcr, the reference voltage VREF may decrease with increasing temperature, such that the reference voltage VREF(Hot) at a relatively high temperature is less than the reference voltage VREF(Cold) at a relatively low temperature, as shown in FIG. 2.
Such a negative temperature characteristic may be undesirable when producing a reference voltage for a power supply circuit. As the reference voltage decreases with increasing temperature, the level of the power supply voltage that is generated based on the reference voltage may also decrease. This can cause operating speeds of circuits receiving the power supply voltage to decrease.
This phenomenon can represent an obstacle to effectively using low power supply voltages, such as 3.3V.
According to embodiments of the present invention, a reference voltage source circuit includes a reference voltage generation circuit that inputs external power voltage and produces a first reference voltage with a first temperature characteristic, and a level shifter circuit that produces a second reference voltage with the first temperature characteristic from the first reference voltage and outputs the second reference voltage as a reference voltage. In particular, the reference voltage generation circuit may use a circuit configuration that is configurable to produce reference voltages in first and second ranges with respective positive and negative temperature characteristics, with the reference voltage generation circuit being configured to produce the first reference voltage in the first range with a positive temperature characteristic. The level shifter circuit may be operative to provide a voltage drop between the first and second reference voltages such that the second reference voltage is in the second range.
In embodiments of the present invention, the reference voltage generation circuit includes a first resistor having a first terminal connected to a power supply node and a second terminal connected to a first node at which the first reference voltage is produced, and a second resistor having a first terminal coupled to the first node. A first NMOS transistor has a source terminal connected to a drain terminal of the first NMOS transistor at a third node, a gate terminal connected to the power supply node, and a drain terminal connected to a power supply ground. A PMOS transistor has a source terminal connected to the first node, a gate terminal connected to the second node and a drain terminal connected to the power supply ground. In other embodiments of the invention of the present invention, the level shifter circuit includes an NMOS transistor having a source terminal and a gate terminal coupled to the first node and a drain terminal connected to a fourth node at which the second reference voltage is produced.
In still other embodiments of the present invention, the reference voltage generation circuit includes a current limit circuit coupled to a power supply node, a voltage divider circuit coupled to the current limit circuit at a first node at which the first reference voltage is produced and to a power supply ground and a voltage source circuit coupled to the voltage divider circuit at the first node and at a second node. The level shifter circuit includes a voltage drop circuit coupled between the first node and a third node at which the second reference voltage is produced, and a current pass circuit coupled between the third node and the power supply ground.
In method embodiments of the present invention, a first reference voltage with a first temperature characteristic is generated. The first reference voltage is level shifted to produce a second reference voltage with the first temperature characteristic For example, a reference voltage generation circuit may be configured to produce the first reference voltage in a first range with a positive temperature characteristic, wherein the reference voltage generation circuit uses a circuit configuration that is configurable to produce reference voltages in the first range and a second range with respective positive and negative temperature characteristics. A voltage drop may be provided between the first and second reference voltages such that the second reference voltage is in the second range.